Ebook Computer Architecture: A Quantitative Approach, 3rd Edition

Ebook Computer Architecture: A Quantitative Approach, 3rd Edition

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Computer Architecture: A Quantitative Approach, 3rd Edition

Ebook Computer Architecture: A Quantitative Approach, 3rd Edition

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From the Back Cover

This best-selling title, considered for over a decade to be essential reading for every serious student and practitioner of computer design, has been updated throughout to address the most important trends facing computer designers today. In this edition, the authors bring their trademark method of quantitative analysis not only to high performance desktop machine design, but also to the design of embedded and server systems. They have illustrated their principles with designs from all three of these domains, including examples from consumer electronics, multimedia and web technologies, and high performance computing.The book retains its highly rated features: Fallacies and Pitfalls, which share the hard-won lessons of real designers; Historical Perspectives, which provide a deeper look at computer design history; Putting it all Together, which present a design example that illustrates the principles of the chapter; Worked Examples, which challenge the reader to apply the concepts, theories and methods in smaller scale problems; and Cross-Cutting Issues, which show how the ideas covered in one chapter interact with those presented in others. In addition, a new feature, Another View, presents brief design examples in one of the three domains other than the one chosen for Putting It All Together.The authors present a new organization of the material as well, reducing the overlap with their other text, Computer Organization and Design: A Hardware/Software Approach 2/e, and offering more in-depth treatment of advanced topics in multithreading, instruction level parallelism, VLIW architectures, memory hierarchies, storage devices and network technologies.Also new to this edition, is the adoption of the MIPS 64 as the instruction set architecture. In addition to several online appendixes, two new appendixes will be printed in the book: one contains a complete review of the basic concepts of pipelining, the other provides solutions a selection of the exercises. Both will be invaluable to the student or professional learning on her own or in the classroom. Hennessy and Patterson continue to focus on fundamental techniques for designing real machines and for maximizing their cost/performance.FeaturesPresents state-of-the-art design examples including:IA-64 architecture and its first implementation, the Itanium Pipeline designs for Pentium III and Pentium IV The cluster that runs the Google search engine EMC storage systems and their performanceSony Playstation 2Infiniband, a new storage area and system area networkSunFire 6800 multiprocessor server and its processor the UltraSPARC IIITrimedia TM32 media processor and the Transmeta Crusoe processorExamines quantitative performance analysis in the commercial server market and the embedded market, as well as the traditional desktop market.Updates all the examples and figures with the most recent benchmarks, such as SPEC 2000.Expands coverage of instruction sets to include descriptions of digital signal processors, media processors, and multimedia extensions to desktop processors.Analyzes capacity, cost, and performance of disks over two decades.Surveys the role of clusters in scientific computing and commercial computing.Presents a survey, taxonomy, and the benchmarks of errors and failures in computer systems.Presents detailed descriptions of the design of storage systems and of clusters.Surveys memory hierarchies in modern microprocessors and the key parameters of modern disks.Presents a glossary of networking terms.

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About the Author

John L. Hennessy is the president of Stanford University, where he has been a member of the faculty since 1977 in the departments of electrical engineering and computer science. Hennessy is a fellow of the IEEE and the ACM, a member of the National Academy of Engineering, the National Academy of Science, the American Academy of Arts and Sciences, and the Spanish Royal Academy of Engineering. He received the 2001 Eckert-Mauchly Award for his contributions to RISC technology, the 2001 Seymour Cray Computer Engineering Award, and shared the John von Neumann award in 2000 with David Patterson. After completing the project in 1984, he took a one-year leave from the university to co-found MIPS Computer Systems, which developed one of the first commercial RISC microprocessors. After being acquired by Silicon Graphics in 1991, MIPS Technologies became an independent company in 1998, focusing on microprocessors for the embedded marketplace. As of 2004, over 300 million MIPS microprocessors have been shipped in devices ranging from video games and palmtop computers to laser printers and network switches. Hennessy's more recent research at Stanford focuses on the area of designing and exploiting multiprocessors. He helped lead the design of the DASH multiprocessor architecture, the first distributed shared-memory multiprocessors supporting cache coherency, and the basis for several commercial multiprocessor designs, including the Silicon Graphics Origin multiprocessors. Since becoming president of Stanford, revising and updating this text and the more advanced Computer Architecture: A Quantitative Approach has become a primary form of recreation and relaxation.David A. Patterson was the first in his family to graduate from college (1969 A.B UCLA), and he enjoyed it so much that he didn't stop until a PhD, (1976 UCLA). After 4 years developing a wafer-scale computer at Hughes Aircraft, he joined U.C. Berkeley in 1977. He spent 1979 at DEC working on the VAX minicomputer. He and colleagues later developed the Reduced Instruction Set Computer (RISC). By joining forces with IBM's 801 and Stanford's MIPS projects, RISC became widespread. In 1984 Sun Microsystems recruited him to start the SPARC architecture. In 1987, Patterson and colleagues wondered if tried building dependable storage systems from the new PC disks. This led to the popular Redundant Array of Inexpensive Disks (RAID). He spent 1989 working on the CM-5 supercomputer. Patterson and colleagues later tried building a supercomputer using standard desktop computers and switches. The resulting Network of Workstations (NOW) project led to cluster technology used by many startups. He is now working on the Recovery Oriented Computing (ROC) project. In the past, he served as Chair of Berkeley's CS Division, Chair and CRA. He is currently serving on the IT advisory committee to the U.S. President and has just been elected President of the ACM. All this resulted in 150 papers, 5 books, and the following honors, some shared with friends: election to the National Academy of Engineering; from the University of California: Outstanding Alumnus Award (UCLA Computer Science Department), McEntyre Award for Excellence in Teaching (Berkeley Computer Science), Distinguished Teaching Award (Berkeley); from ACM: fellow, SIGMOD Test of Time Award, Karlstrom Outstanding Educator Award; from IEEE: fellow, Johnson Information Storage Award, Undergraduate Teaching Award, Mulligan Education Medal, and von Neumann Medal.

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Product details

Hardcover: 1136 pages

Publisher: Morgan Kaufmann; 3 edition (May 31, 2002)

Language: English

ISBN-10: 1558605967

ISBN-13: 978-1558605961

Product Dimensions:

8 x 2.2 x 9.8 inches

Shipping Weight: 4.6 pounds

Average Customer Review:

3.9 out of 5 stars

174 customer reviews

Amazon Best Sellers Rank:

#680,987 in Books (See Top 100 in Books)

I'm using this book for a graduate course in Computer System Design. It's a great book, well put together, and very interesting. What is needed is a new edition. This book was written during the days of the single core processor speed wars around 2005. Since then there was the core war (2 cores, 4 cores, 6 cores on desktop computer systems), and today the explosion in technical advances with mobile devices. A year ago it was the speed war up to the 1 GHz mark, and today mobile hand-held devices are being released with 1 GHz dual-core processors, and even announcements of quad core mobile devices by the end of the year. It's a much different world than it was in the Pentium 4 days. The information, equations, etc are spot on, as this is the bible for this information. But reading a book that often references 6-7 year old technologies as current or up and coming, at times it feel more like reading a well written history book. It would be interesting to see references and discussions on the computer architectures in modern mobile devices, as these pocket sized computer systems are increasingly becoming a part of everyone's lives today.

It's a okay read for a first timer like me. I wish it was structured a little better. It jumps around quite a bit. It's not an easy read for a person like me with a mechanical engineering background. But as of now, it's a good reference book. I would recommend it. The diagrams help. But the contents do seem a bit outdated and I'm sure there may be books out there with better layouts.

This book isn't for the timid. It goes deep into several recent CPU designs and explains why the architectures turned out the way they did. There is decent coverage of RISC versus CISC ideas, and why CISC now dominates (hint: it is a combination of luck, marketing, and massive amounts of available transistors, plus new ways of instruction-level parallelism).It does not cover the absolute latest processors. But it doesn't have to. It will give you the background needed that when you go to the website that have technical details of a new architecture (e.g. Ars Technica), chances are good you will know the concepts they reference.Who shouldn't buy this: Programmer's in high level languages expecting to learn some black magic way to speed up your code. Even assembly language programmers have been mostly sidelined by the power of a modern CPU to optimize high-level languages.

I've owned every edition of this wonderful book. Thank you Prof. Hennessy and Patterson, as well as all other contributors for writing such an approachable book, not only for students, but also for practitioners. This edition brings the book up to date with the developments in computer architecture and various surrounding technologies, such as memory, disk, etc.The GPU chapter was fun to read.

If it had a more memorable mascot (such as the dragon book), this would likely have a more communicated handle; if you need to know about architecture, this is it. It explains numerous avenues to pursue performance gains, and gives actual calculations to project the implications of design decisions. Far from being stuck on the general inner workings of a PC, this also delves into warehouse-scale computing and explains other ways of constructing computers than the simple models of working but exceedingly out of date designs.This book is heavy enough to concuss someone with it with a good swing, and there's almost an equal number of pages in accompanying appendices in digital format. That is a lot of material, but it goes a great deal into the minutiae of the low level functions that you probably didn't learn correctly the first time around. Knowledge of basic digital design, organization, a C-based language and familiarity with generic assembly is recommended before tackling this thing.

Brand new "used" book!But it seems that it is too much for a single class.

The authors of this text are THE experts on the material, atleast involving MIPS, and it is evident. however, sometimes i get lost in the details and dont really absorb as much as i do from other texts. i had this same issue with the Computer Organization book written by Hennessey.

For those who have never read this book, I'd emphasize that this is not a computer architecture book that explains some basic stuffs. Instead, this book focuses more on the performance aspect of the computers and I'd say this is the ONLY worthwhile book that discusses from that viewpoint. So, if you are to study the computer performance, your choice is either reading this book or reading tons of papers published by researchers or both. It means you must have a good understanding on the computer architecture before reading this book.My only complaint is that though the book is available only with paperback now, they didn't reduce the price. It's still worth the price, though.

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Computer Architecture: A Quantitative Approach, 3rd Edition PDF

Computer Architecture: A Quantitative Approach, 3rd Edition PDF

Computer Architecture: A Quantitative Approach, 3rd Edition PDF

Computer Architecture: A Quantitative Approach, 3rd Edition PDF